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Seemingly at random, when I start the simulation from Quartus after a successful full build and synthesis of the project, Questa will complains the .vo file of an IP is missing.
Rebuilding the project doesn't seem to do anything once the file is missing. Deleting temporary build files, restarting the computer, or deleting the .qip file and recreating the IP sometimes helps, but then sometimes another IP becomes the problem.
I have double checked all the licenses (for Quartus, IPs, and Questa) and they are all present and valid.
I believe the Quartus and Questa installs, as well as licensing, are all correct since I can simulate designs without IPs, or sometimes even designs with IPs, correctly and without issues.
Any help would be greatly appreciated. Let me know if any additional information would help troubleshoot this issue.
Thanks beforehand,
Juan
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Hi Juan,
This is known issue before and had been bypassed with workaround. Please run only Analysis & Synthesis to perform RTL simulation instead of full compilation.
Btw, RTL simulation actually needs only Analysis & Synthesis will do.
Thanks,
Regards,
Sheng
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Quartus Lite, Standard, or Pro? What IPs are having issues? Are you using Questa starter edition or something else?
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The IPs are lpm_mult, parallel_add, but the one that is usually giving ng me issues is the multiplier adder intel fpga IP .
The design is on a Arria V GZ.
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Hi,
Possible provide project file for viewing?
Thanks,
Regards,
Sheng
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Hello,
Unfortunately, I am unable to share the original project. I am trying to create a dummy project with similar types and count of IPs, but I am having trouble replicating the issue. Which by itself is shedding some light on the problem. I will upload a project as soon as I can replicate the problem with the simpler one.
Juan
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Hi Juan,
Understood that. Will wait for the sample design.
Thanks,
Regards,
Sheng
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Hello,
I have attached my dummy project full folder. The module has 4 IPs, NCO, LPM_ADD_SUB, and two different variations of the multiplier adder.
I am unable to run the simulation because Questa complains the .vo file of one of the multiplier adder is missing. When I fix one, it complains about the other.
Thanks for your help,
Juan
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Hi Juan,
This is known issue before and had been bypassed with workaround. Please run only Analysis & Synthesis to perform RTL simulation instead of full compilation.
Btw, RTL simulation actually needs only Analysis & Synthesis will do.
Thanks,
Regards,
Sheng
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Great! Thanks! This seems to have resolved the issue. I was following an Intel guide that said to run the whole compilation flow.
Juan

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