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Hello Forum Members,
I have built a small frequency divider with a generic max count parameter:generic (cl_max : in natural:= 50000000 -- 1 hz
);
port(
reset : in std_logic:='0';
cl_in : in std_logic;
cl_out : out std_logic;
cl_up : in natural range 0 to cl_max:=0;
cl_dn : in natural range 0 to cl_max:=cl_max/2
);
end entity;
If I instantiate the module using default values, everything is ok: fDiv : entity work.cl_div_ent(cl_div_arch)
port map(cl_in=>CLOCK_50,
reset=>RESET_N,
cl_out=>pulse_sec);
However if I change the default value in the submodule: generic (
cl_max : in natural:= 5000000 -- 10Hz
);
Quartus keeps on using the previous value (seen in RTL viewer and tested with DE0) If I redefine the default value in main: fDiv : entity work.cl_div_ent(cl_div_arch) generic map(cl_max=>50000000) -- 1Hz
port map(cl_in=>CLOCK_50,
reset=>RESET_N,
cl_out=>pulse_sec);
Everything works correctly, If i then remove the definition in main, fDiv : entity work.cl_div_ent(cl_div_arch)
port map(cl_in=>CLOCK_50,
reset=>RESET_N,
cl_out=>pulse_sec);
the modified initial value in the submodule (10Hz), that was not taken correctly the previous time, now is taken correctly, even if it differs from the value in main. I have the impression that Quartus II is not recompiling my file correctly, however the file is in the project and introducing a bug in the file with the entity generates a syntax error so it is compiled. (All projects are part of the project I have this verified) It could be that I am missing someting but I have no idea what ? Is there way to tell Quartus II 16.0 to reset compilation completely as workaround ? Any ideas welcome. Best regards, Johi.
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I remember that the reported problem existed in old Quartus versions (e.g. V7 or V8). I was under the impression that it has been fixed since long, but I didn't check with every new version. Particularly I'm no using yet V16.
A solution had been and will surely be to delete the db folders and enforce a clean recompilation.
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