Quartus support for VHDL Float/fixed packages

[Altera_Forum]

I was wondering when Quartus will have inbuilt support for the IEEE float and fixed packages?

[Altera_Forum]

Are there other synthesis tools that support this? Since floating point isn't native to hardware, I'm not sure how it would be done. (A floating point add, for example, can probably be done many different ways, resulting in different hardware sizes, latencies, etc.) So supporting floating point functions as configurable megafunctions probably makes more sense(and they do exist there).  

(I've never studied it too much, so this is just a guess...)

[Altera_Forum]

its more the fixed point package Im interested in. It can be done at the moment but has to be set as an external library and then files included as part of the project. 

 I know there are native problems with floating point, and that the altfp components exist, and would always use those.  When will be included in the way the other ieee packages are?