Quartus_syn and nested pragma not supported

[TFisc4]

I have a bunch of vhdl code which needs to be seen from Altera tools but not others, so I am using "altera translate_on/off" nested inside "pragma translate_off/on" directives:

library ieee;
use ieee.std_logic_1164.all;

--pragma translate_off
--altera translate_on
library altera_mf;  -- Example Altera-specific library
use altera_mf.altera_mf_components.all;
--altera translate_off
--pragma translate_on

-- More VHDL code here

It has been working well for few years with quartus_map. But now quartus_syn has replaced it, and doesn't support nested pragma anymore which throws "unmatched altera translate/synthesis pragma found" warnings before an "unexpected end-of-file" error.

Is there a plan to restore the support of nested pragma ?
Is there a recent version of Quartus which still have the quartus_map executable ?

[ShengN_Intel]

Hi,

Pragma is not supported in pro version check this link https://www.intel.com/content/www/us/en/docs/programmable/683475/19-4/remove-non-standard-pragmas.html

Intel® Quartus® Prime Pro Edition synthesis does not support the vhdl(verilog)_input_version pragma or the library pragma. Synthesis in other Quartus software products supports these pragmas. Remove any use of the pragmas from RTL for Intel® Quartus® Prime Pro Edition migration.

Remove the pragma and just use it with other synthesis tools. Pro version is more strict.

Thanks,

Regards,

Sheng

[TFisc4]

Hi Sheng,

Thanks you for the tip, even though it seems to contradict the documention: Intel® Quartus® Prime Pro Edition Help version 23.1 - vhdl_input_version Synthesis Directive & Intel® Quartus® Prime Pro Edition Help version 23.1 - library VHDL Synthesis Directive

Anyway in my case this is related to the "synthesis_off/on" directives. They are understood by the tool (and you can disable its support if needed), but contrary to others vendors tools and now old quartus_map, the quartus_syn doesn't support nesting it, as in my example.

Best regards,

--

Thierry

[TFisc4]

For instance take this code which compiles for both quartus_map✔& quartus_syn✔:

library ieee;
use ieee.std_logic_1164.all;

--altera translate_off
--altera translate_on
library altera_mf;  -- Example Altera-specific library
use altera_mf.altera_mf_components.all;
--altera translate_off
--altera translate_on

But that one compiles only on quartus_map✔ and fails on quartus_syn with "unexpected end-of-file" error:

library ieee;
use ieee.std_logic_1164.all;

--pragma translate_off
--altera translate_on
library altera_mf;  -- Example Altera-specific library
use altera_mf.altera_mf_components.all;
--altera translate_off
--pragma translate_on

[ShengN_Intel]

Hi,

The quartus_syn supports nesting but just not support pragma as mentioned in this document link https://www.intel.com/content/www/us/en/docs/programmable/683475/19-4/remove-non-standard-pragmas.html

Thanks,

Regards,

Sheng