Hi again,
I'm working hard on my system design, but I'm stucked with VGA. The problem isn't VGA, in the RTL simulation works great, I'm only printing on the screen typical test columns. the problem is that simulation RGB outputs on the simulation aren't RGB outputs of my FPGA. I'm geting mad, and no one in my university knows how to fixe this. I controlled all the timings and they are perfect. I attach a photo of the screen and a capture of my laptop with the most important signals. For help you helping me the characteristics are: 800x600 60Hz, 40Mhz pixel clock, I use a fifo for loading the row from the SDRAM, the screenshot is f a randome line. the simulation is great but implementation isn't, I will understand some delay errors but not this big diference between them. Thank you very much, Guillermo
