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Hello,
On an Arria V FPGA - what are the recommended pins for driving an output clock for a source synchronous interface ?
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Hi Shai Kon,
You may refer to the pin connection guidelines at link below for the list of recommended clock pin.
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/dp/arria-v/pcg-01013.pdf

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