Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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Regenerate .ip files automatically

RPett4
Beginner
1,082 Views

In our version control tool, only the *.ip files were checked in. When I try to compile the design in Quartus, it complains that "The synthesis RTL for *.ip has not been generated. Generate the synthesis RTL from within Platform Designer." In Quartus, I can manually open each *.ip file in the "IP Parameter Editor" and click "Generate HDL..." and everything is fine.

 

Is there a way to automate this step? I would like to just click "Compile Design" and then have these "Generate HDL" commands happen automatically.

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1 Solution
Kenny_Tan
Moderator
809 Views

There is a option for you,

 

You can go to assignment -> settings -> IP settings. Check which setting you will need to turn on.

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5 Replies
Kenny_Tan
Moderator
810 Views

There is a option for you,

 

You can go to assignment -> settings -> IP settings. Check which setting you will need to turn on.

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Kenny_Tan
Moderator
809 Views

Any update?

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RPett4
Beginner
809 Views

This is a pretty good solution, and it worked. Does this setting get saved into a project file? The reason I ask is that if I build on my own computer, it works fine since I have already changed the setting in my instance of Quartus Prime. But if someone else tried to compile the project on a different computer, my worry is that it would fail and it is possible that they would not know that this setting needs to be changed.

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Kenny_Tan
Moderator
809 Views

Yes, it should be. what you can do is archieve the project to *.qar files. Can unarchieve it to check the setting again.

 

If it does not save, let me know as it would be a bug.

 

Thanks

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Kenny_Tan
Moderator
809 Views

Any further question?

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