SCK Pin not showing up in TimeQuest

[Altera_Forum]

Hello - I am new to the forums and new to Quartus II, so please excuse my noobness!  

 I have downloaded the trial version of Quartus II 10.0 and have been trying to run some simulations of some logic I want to eventually end up on a CPLD. I have been following those interactive tutorials in order to try to simulate my project. I have gotten to the step where it shows me how to "constrain and report clocks", but am running into a problem here that I am hoping someone can help me with.   The problem is that when I get into the TimeQuest Timing Analyzer window and I want to Create Clock (Constraints Menu > Create Clock...). When the Create Clock window pops up, I browse to choose a target and in the browsing window, I try to get all the pins, but my SCK pin, the clock pin I need to use, is not available.  Every other pin I have in my top level is there except for my SCK pin. I have double checked the connections on the schematic I've made. There doesn't seem to be any difference between the SCK pin and the other pins that ARE showing up when I browse. I'm pretty stumped.   Is there some reason why my SCK pin is not showing up? Is there some step that I missed along the line?   Any help or suggestions would be hugely appreciated!  Thanks! :)

[Altera_Forum]

Have you tried to write the clock constraint manually? 

 create_clock -name "SCK" -period 1000 [get_ports sck]

[Altera_Forum]

Here's the response I get when I entered the command in the TimeQuest tcl console: 

    --- Quote Start ---  create_clock -name "SCK" -period 1000 [get_ports sck] Warning: Ignored filter: sck could not be matched with a port Warning: Ignored create_clock: Argument <targets> is an empty collection  --- Quote End ---     It's almost like my SCK pin isn't showing up as a valid port.   I already have assigned pins to the various ports on my top level, so for instance, my SCK is on pin 12, and the others (MISO, Bus_Int, etc) are assigned to various other pins around the CPLD. The SCK pin is correctly paired with a clock pin on the CPLD as well.   Any more suggestions with this new information??  Is there any more information I could provide that might help?

[Altera_Forum]

Is there maybe a way to designate that input as a clock? Or perhaps a completely different way to do timing/simulation rather than the TimingAnalyzer?  

 I just need to make sure my logic works before I program it to the CPLD.  Any suggestions? Should I download Model Sim instead? Just not sure how to proceed...   Thanks in advance...

[Altera_Forum]

*dumb* question. 

 Is "SCK" a input port in your top level?