SSRAM Memory Test Failed

[Altera_Forum]

Hi! 

I am currently working on Cyclone II EP2C70F672C6N DSP Development Kit of Altera. I am trying to run Nios II memory test small example to test the ssram. The problem i am facing is that once the program is downloaded through Nios II, the memory test fails after i give address range for memory testing. I have used Qsys to build the system by using Production Test Example given in Nios II installation folder. The example uses Cypress SSRAM CY7C1380 while the SSRAM present onmy board is Cypress CY7C1360B. But the production test example runs fine which shows that this scheme works. The error i got in Nios II says: Data bus test failed at bit 0x1.  I am so stuck in this issue. Help me ...

[Altera_Forum]

Are you sure you are using the correct address for the SSRAM? The test fails on the first test, so it's possible that your QSys design can't access the memory at all. Try to put some signaltap probes on the SSRAM signals to see if your design is doing anything when you test the memory.