I am using Quartus Prime V18.0. I have a Serial Flash Controller II talking to my EPCQ(ASx4). I have two subsystems that each have a NIOS II CPU in them. One system is of my own design, the other one is fairly locked down. I have no access to the code for the locked down system either. Each subsystem uses a MM-Pipeline Bridge to hook back up to the EPCQ at the top of the qsys design. I have found that if the serial flash controller is not connected directly to the CPU, the appropriate drivers do not get included. Thus I cannot open a dev_handle to the component. So now I am unsure of how to proceed as the pipeline bridges prohibit me from communicating to the EPCQ. Any help would be greatly appreciated.
By "locked down" I mean that the IP I am using requires the subsystem to match exactly to the documentation; I do have full access to how the buses are hooked up. The NIOS II code for that CPU/subsystem is pre-compiled (communications stack) and I am only provided the image, thus the QSYS must match exactly.
After some investigation it seems that swapping in an Address Span Extender may have solved the issue. I need to do some more reading as I'm not entirely sure how this is solving my problem ( the EPCQ driver is now showing up in my BSP project).
The BSP generator automatically generates the required drivers based on the IPs connected to NIOS II. In case of not connecting the IP to NIOS, naturally you don't require these drivers (this how the BSP generator thinks). In this case you can manually edit the BSP.