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Hi to all, I' m doing a project with Arria 10 Soc and I want to use 12 pins of shared pin bank (bank 2L) for some HPS peripherals (2 Uarts ) , the other 36 pin should be used to FPGA logic. The peripheral pins has 1.8 V, the pins used to the FPGA are 3.0 LVCMOS volt (it is a mandatory request of our hardware lab)
I' ve an error of conflict of 2 different voltages, it is a solution to have 2 different voltage on bank 2L or I should move the Uart to dedicated HPS pins ??? Uarts are in a dedicate subbank (quad0 ) , logic pins are in others 3 subquad of 12(quad1 quad 2 quad3 ) In the Qsys project I've preserve quad1 quad2 quad 3 to logic. Thanks a lotLink Copied
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