Signal Tap "program device to continue"

[Altera_Forum]

Hello: 

 I have a design that signal tap runs correctly. Added a few signals to signal tap and few tweaks to the design and recompiled ok. There are no "red" signals in signal tap. I checked the path to the .sof file and it is correct. The shell says that the it downloaded successfully. However, signal tap gives me the "program device to continue" and therefore I can't run it.   Is there anything else I can check to determine the source of the problem? I read the application note and I don't see something obvious that I am doing wrong.   thank you

[Altera_Forum]

Just some thoughts... 

Can your part self reconfigure by itself or from another part of the system?  If you sys has a reset signal that re configure the fpga from flash or something like that.

[Altera_Forum]

also: 

check that your tweaks didn't include a licensed core that cause the design to be compiled in a time limited .sof instead of the regular one. check in the assembler report that the .sof file was indeed written, and what path it is using verify that the date of the .sof file you are uploading to the FPGA matches your last compile. You can upload the .sof directly from the signaltap window by the way, it is just under the JTAG settings.