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I want to see what is the delay from signal source to output after I do SignalProbe. The Quartus handbook said that
--- Quote Start --- The SignalProbe source to output delays screen in the Timing Analysis section of the Compilation Report displays the timing results of each successfully routed SignalProbe pin --- Quote End --- See page 5 of this document http://www.altera.com/literature/hb/qts/qts_qii53008.pdf But when I follow what this document said, I don't see this information in Quartus. Any idea why? Thanks in advance. I am using Quartus 10.1 on Linux platform.- Tags:
- FPGA Design Tools
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