Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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SignalProbe source to output delays missing in timing report

Altera_Forum
Honored Contributor II
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I want to see what is the delay from signal source to output after I do SignalProbe. The Quartus handbook said that 

 

--- Quote Start ---  

The SignalProbe source to output delays screen in the Timing Analysis section of the 

Compilation Report displays the timing results of each successfully routed 

SignalProbe pin 

 

--- Quote End ---  

 

 

See page 5 of this document http://www.altera.com/literature/hb/qts/qts_qii53008.pdf 

 

But when I follow what this document said, I don't see this information in Quartus.  

 

Any idea why? Thanks in advance. 

 

I am using Quartus 10.1 on Linux platform.
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