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Altera_Forum
Honored Contributor I
786 Views

SignalTap problem with SoCFPGA configured by HPS

Hi, 

I have a problem using SignalTapII that occurs when the FPGA is configured by HPS. 

 

I have a design with u-boot bootloader and custom linux with drivers handling my FPGA IPcores. 

 

When I: 

1) pause u-boot; 2) load fpga from sof file with blaster; 3) boot linux from command line;  

everything works OK and i can hook up the SignalTapII and look at the signals. 

 

When I load the fpga with u-boot script from rbf file, my design: 

a) behaves little bit different (some reset issues? I Don't Know) 

b) I cannot hook up the SignalTapII connection. SignalTapII shows "Not compatible with the device" and "Program the device and continue" 

 

I generate rbf file with "File->convert programming file..." option in quartus 

 

Have You got any ideas what could go wrong?
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2 Replies
Altera_Forum
Honored Contributor I
32 Views

It should work, are you sure that the rbf file is the correct one and not another version of your compiled project without signaltap, or a different instance of signaltap? 

Converting the file to rbf will not take away the signaltap module from the FPGA design.
Altera_Forum
Honored Contributor I
32 Views

Thanks for the replay, 

I have quadriple-checked :D conversion and eventually it started to work. I'm suspecting some file access issues in my system (I have virtual machine and shared folders).  

Strangely the date of the file was different but the internals were outdated. 

Anyway, i guess the issue is resolved. 

Thanks again!