Signaltap II shows me incorrect time

Altera_Forum · ‎11-23-2012

Hi all

I use both oscilloscope and signaltap II to observe an I2C waveform of 100k.

The waveform is fine and I can see correct start/stop condition, address, and data.

However, the period of SCL measured by signaltap II is different from the period measured by oscilloscope.

The clock used in signaltap II is an external clock of 125MHz.

So I believe the clock for sampling signals should be fast enough.

Is there any other options I need to modify in order to see the correct time measurement.

Does anyone have the same problem?

Thanks.

Altera_Forum · ‎11-26-2012

Is there a huge difference? Are you sure that your 125MHz input clock is stable, does the design meet all timing requirements? Are you using a storage qualifier in SignalTap?

Altera_Forum · ‎11-26-2012

Hi Daixiwen

I'm using Cyclone IV dev. kit. So the 125MHz clock should be stable.

My design violates some of my timing constraints.

(It's weird that 125MHz clock has negative slack in holding time even though I've added "create_clock -name {clk125M} -period 8.000 -waveform { 0.000 4.000 } [get_ports {clk125M}])."

Does this negative slack cause me this problem?

Altera_Forum · ‎11-27-2012

I don't think it would create this kind of problem. You can still try to run the timing advisor (from the Tool > Advisors menu) to fix the timing problems (do you have the multi-corner timing analysis turned on?).

Could you show a screenshot showing the scl signal with a bad period? How do you measure the period?

Altera_Forum · ‎11-27-2012

Hi Daixiwen

Thank you for your help.

I attach two images.

One shows the waveform captured by an oscilloscope.

(Waveform in yellow color is sda; waveform in blue color is scl)

The other shows the waveform captured in signaltap ii.

The period of scl in oscilloscope is about 12~13 us.

However, the period of scl in signaltap ii is about 1~2 us.

The time unit I set in signaltap ii is 1 ns.

Altera_Forum · ‎11-27-2012

Signaltap is taking one sample every clock - 125MHz - so one sample every 8ns.

You almost certainly need to set the 'time unit' to 8ns to match this.