Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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Simulating Altera High Performance DDR2 Memory Controller using Modelsim

Altera_Forum
Honored Contributor II
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I've had problems simulating the Altera High Performance DDR2 Memory Controller using modelsim 6.2c (windows) and 6.3a (linux). I'm trying to run a simulation of the example design and testbench, out-of-the-box, with no modifications.  

 

Using a NativeLink and/or my own custom tcl script, the design and testbench compile correctly, but running a simulation using vopt optimization causes a segmentation fault in modelsim - turning off optimizations using '-novopt' stops this error which can be isolated to the phy_ddio_dp module.  

 

I've spent some hours trying to work out what is broken, but have managed to resolve the problem by installing modelsim 6.6b (linux) on which everything works as it should with optimizations in place.  

 

Hope this is helpful information for anyone else who is struggling.
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