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Simulation configuration issues Avalon modular scatter gather DMA

Ashish_Pradhan
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Hello, 

 

I am trying to simulate an Avalon modular scatter gather DMA  in Stream to memory map configuration. 


 I am trying to send descriptor info (providing write address in appropriate field as specified in the user guide, appropriate Byteenable, & Driving "write" signal high from test bench to the DUT (i.e msgdma_0), through the descriptor channel (msgdma_0_descriptor_slave_write, *_descriptor_slave_writedata, *_descriptor_slave_byteenable).


I am also driving data and valid through "msgdma_0_st_srink_data", "msgdma_0_st_srink_valid" and feed to the DUT(msgdma_0),  configured CSR field as per user guide.

Simulation is running properly without any error, I can see all the test bench signals in the waveform as expected.

But I do not see any output coming out from the platform designer generated IP (msgdma_0) in their respective output ports such as (msgdma_0_mm_write_address, *_mm_write_write, *_mm_write_byteenable, *_mm_write_writedata, or *_csr_irq_irq).

Can you pls guide where I am going wrong ? or suggest how can I get the expected behavior of Avalon modular scatter gather DMA.

 

Thanks,

Ashish.

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3 Replies
ShengN_Intel
Employee
510 Views

Hi,


May I know are you interface this ip with nios?


Thanks,

Regards,

Sheng


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ShengN_Intel
Employee
510 Views

Hi,


I had tapped the design and the waveform as below:


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ShengN_Intel
Employee
506 Views

Hi,


I had problem attached the waveform. I sent to your personal email.


Thanks,

Regards,

Sheng



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