Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
17254 Discussions

Specifying global memory buffer location for Nallatech P385 D5

Altera_Forum
Honored Contributor II
1,167 Views

Hi,  

 

I would like to specify global memory as on-chip RAM of Nallatech P385 D5 board. According to the instruction of the Programming Guide (Section "Specifying Buffer Location in Global Memory"), I need to use the attribute buffer_location("") and refer to the board_spec.xml for the name of the global memory types (see below). However, I don't see any names in my setup of the P385 D5 board. Any idea on how to place global memory on on-chip RAM for the P385 D5 board? Feedback much appreciated.  

 

D5 board_spec.xml  

----------------------------- 

<global_mem max_bandwidth="25600" interleaved_bytes="1024"> 

<interface name="board" port="kernel_mem0" type="slave" width="512" maxburst="16" address="0x000000000" size="0x100000000" latency="240"/> 

<interface name="board" port="kernel_mem1" type="slave" width="512" maxburst="16" address="0x100000000" size="0x100000000" latency="240"/> 

</global_mem> 

----------------------------
0 Kudos
1 Reply
Altera_Forum
Honored Contributor II
470 Views

Hi, 

 

You would need to create a custom BSP to add a BRAM global memory buffer so it is accessible directly from the host (a new board_spec.xml file will not be enough). 

 

The FPGA BRAM resources are used by the OpenCL SDK compiler, just not as a global memory buffer. 

 

The flow of developing custom BSP is described here: 

https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/hb/opencl-sdk/ug_aocl_custom_platform_toolkit.pdf 

 

G
0 Kudos
Reply