May I know the part number Are you using SERDES IP?
If yes, there are limitations that you have to follow. If you do not have enough Tx channel you can concert Rx channel to Tx.
If you are not using SERDES, can check in Quartus if this can be assigned as GPIO and if this GPIO can be assigned as LVDS IO standard.
I think the question I asked is wrong.
When designing the board, I connected the input signal to DIFFIO_TX and DIFFIO RX, and finally observed that B has a signal, and DIFFIO_TX has no signal. So I wonder if DIFFIO_TX can be configured as LVDS INPUT like DIFFIO RX, through primitives or other way.