System Console to inject commands into fifo

[Altera_Forum]

Hi, 

could anyone please outline the steps necessary to allow me to write commands into a fifo in my design using system console or point me to a relevant tutorial?  Thanks,

[Altera_Forum]

This tutorial shows how to setup a Qsys design and to use system console: 

 http://www.alterawiki.com/wiki/using_the_usb-blaster_as_an_sopc/qsys_avalon-mm_master_tutorial  However, injecting commands into a FIFO is not really a feature of system console, that would be a feature of your design, eg., write to a location using system console to write to your FIFO logic.  Cheers, Dave

[Altera_Forum]

Thanks. Pretty much the conclusion I had come to. I'm guessing I'll have to create a MM slave component which simply transfers the data to the fifo external to the Qsys system. I suppose it could be done with a PIO but it would be a bit clunky.

[Altera_Forum]

--- Quote Start ---  I'll have to create a MM slave component which simply transfers the data to the fifo external to the Qsys system. I suppose it could be done with a PIO but it would be a bit clunky.  --- Quote End ---    If I want high-performance Avalon-ST streaming, I'll often use dual-ported RAM for this sort of thing; with one side of the RAM as an Avalon-MM slave, and the other as the data source to the device under test. In your case, the other port of the RAM could be an Avalon-ST component that you can use as your data source (or sink).   The RAM allows you to inject the commands into your component on back-to-back clock cycles.  If you want to see how the JTAG-to-Avalon-ST bridge implements an Avalon-ST command stream, see this document:  http://www.ovro.caltech.edu/~dwh/correlator/pdf/altera_jtag_to_avalon_analysis.pdf  Cheers, Dave