Writing the .flash file to flash on the target

[Altera_Forum]

Greetings, 

 I would like to do the similar functions that nios2-flash-programmer performs on the target. So I need to know what nios-flash-programmer does on the target.  Does nios2-flash-programmer just write the ascii file to the flash or does it convert it to binary and perform other processing?   Thank you.  C. Hewitt

[Altera_Forum]

The .flash file is SREC format. You need to decode the file to binary, and then write this to the flash.

[Altera_Forum]

When I convert the file to ASCII do I just convert each ascii character to binary and strip out the carriage return and line feed? 

 What exactly happens to a .flash file before it is written to the FPGA by the nios2-flash-programmer?

[Altera_Forum]

No, check this: http://en.wikipedia.org/wiki/srec_(file_format)

[Altera_Forum]

I know what an S record looks like my questions are 

 1) Do I just convert each ASCII character to binary? 2) Do I get rid of the S0, S5, S6, S7, S8 and S9 records? 3) Do I get rid of all SX values and just convert the data? 4) Do I put the two digit ASCII values into one binary byte?  In other words when one says convert the file to binary define exactly what that means.   Thank you.

[Altera_Forum]

The format of the data on the flash depends on what the boootloader code expects. 

Since you don't want it to be anywhere near the size of an S record file (which is probably 3 characters/bytes for each data byte). I suspect the bootloaded needs address:length:data triplets - all as binary data with some defined endianness (etc).  Personally I'd either write a bootloader that can directly process the ELF image (having stripped out all the unnecessary sections), or write a program to extract the loadable program segments together with their offsets and sizes to make a smaller file. I wouldn't go via S record format at all!  I actually suspect that the Altera boot code can only load to one contiguous block of memory. This is rather sub-optimal in the extreme if you are trying to load code into tightly coupled instruction memory and also initialise multiple separate data areas.

[Altera_Forum]

No as a matter of fact the altera bootloader can load several chunks of data at different memory addresses. Each chunk starts with a 8 byte header, 4 bytes with the destination address and 4 bytes with the chunk size. If the chunk size is 0 it means that the destination address is in fact the address to jump to to start the application. So what is flashed is actually a pre-digested version of the elf file. 

 To answer the OP, in the SREC file you need to read each line individually and decode it. Find out the line's destination address, decode the data from hexadecimal to binary and write it at the specified address.

[Altera_Forum]

Altera .flash files only use S0, S3 records and from Quartus 10.1 also S7 records on the Nios code file. (at least when using EPCS, which I have experience with) 

You can just skip the S0 records, decode the S3 records and use the S7 records to find the end of the file. First you have to erase the area of the flash you are going to write two. Then decode the S3 lines until one flash block of data is buffered to a RAM and then write the whole block the flash. You have two flash files, one for the FPGA configuration and one for the Nios code. These can be concatenated.

[Altera_Forum]

--- Quote Start ---  No as a matter of fact the altera bootloader can load several chunks of data at different memory addresses. Each chunk starts with a 8 byte header, 4 bytes with the destination address and 4 bytes with the chunk size. ....  --- Quote End ---  In which case a direct convertion from the ELF program file has to be easier to generate than going via SREC format.  I could probably generate it in a shell script by parsing the output of 'objdump -p' and using 'dd' to copy over the data blocks.