Is it possible to use timequest to have information about delays inside an asynchronous design?
I would like to know the time between 2 nodes that are not linked by any clock. I have just combinatorial functions.
But if I try to use the report_path command:
report_path -from [x] -to [y]
I just receive:
Report Path: No paths were found
Thanks for help
You don't mention what x and y are (ports, pins?) but the main command to use is report_timing. It should look something like this:
report_timing -setup -from [get_[pins/ports] x] -to [get_[pins/ports] y]
Does the design contain any registers? You can see the delay for a combinational logic between registers by reporting the timing between the registers. The Timing Analyzer recognizes and analyzes the following timing paths only.
Thank you for your answer.
So if I don't have any register there is no way to know delays between luts?
report_timing gives the same:
"Report Timing: No setup paths were found"