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Timing closure problems in Quartus 12.0sp2

Altera_Forum
Honored Contributor II
‎10-25-2012 03:12 PM
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I have recently updated from Quartus 11.1 to Quartus 12.0sp2 and am now finding that several of my designs which previously had no problems making timing closure will fail with the new Quartus version. 

 

Switching back and forth between versions I see clear differences in the quality of the results for identical source input. 

 

Were there any changes in 12.0sp2 to speed up compile time at the expense of the routing quality? If so, is there a setting to get back to the previous version's performance?
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Altera_Forum
Honored Contributor II
‎10-25-2012 04:10 PM
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To really determine if one version results in better timing than another, you must run several seeds. A single compile in each version is not a valid comparison due to seed noise.

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Altera_Forum
Honored Contributor II
‎10-25-2012 05:28 PM
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Thanks for the feedback. 

 

I've been compiling these projects (the issue occurs on multiple projects) in 11.1 for several months and haven't seen any timing violations across a large number of builds. Typically I see a positive slack of 0.7ns or so. 

 

Switching to 12.0 I just rebuilt all my projects and about half of them are failing timing. I tried doing a quick seed sweep in the 12.0 DSE on one of them, but it wasn't able to meet timing at any of the seeds I used. I'm trying a seed sweep in DSE again at the highest effort level, but that will take a while. 

 

Something is definitely different in 12.0sp2 that's causing worse results the 11.1. On the plus side it's faster, so I'm assuming that they adjusted some algorithms to speed up compile time at the cost of design performance. I'm hoping there's a setting to go back to the older method so I won't have to switch back to 11.1
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Altera_Forum
Honored Contributor II
‎10-25-2012 05:45 PM
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What device family are you using? If it is a 28 nm family (Stratix V, Arria V, Cyclone V), then I'd suggest filing a Service Request as this would be an interesting case to explore and may trigger a change. If it is not for a 28 nm family, then there isn't much chance of affecting a change in the software. You'd have to resort to other timing closure techniques or stay in 11.1 if you can.

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Altera_Forum
Honored Contributor II
‎10-25-2012 05:47 PM
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Cyclone III and Cyclone IV devices. Both seem to have similar problems. 

 

Thanks, I'll probably just live with 11.1 for as long as I can. Hopefully this will improve in some future version
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