Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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Training Labs issue (Become_FPGA_Designer)

Altera_Forum
Honored Contributor II
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I have been working on the lab 3 of the Become_FPGA_Designer training material. 

On page 25 of the labs document it displays the report all summaries report. When  

I do the same thing, the clk_int values are different from the lab document. 

 

clk_int -8.767 -140.090 

sdram_clk_int 3.023 0.000 

n/a 5.057 0.000 

clk 16.855 0.000 

 

Do you have any idea what I did wrong ? I notice that the lab document is for Quartus II v15.1. 

And my installed software is Quartus II v16.1.0 Build 160 10/24/2016 SJ Lite Edition. Would that  

have any effect on this problem ? 

 

Randy
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