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Hello,
I have a bug similar to the one reported here :
https://community.intel.com/t5/Intel-Quartus-Prime-Software/Avalon-Verification-IP-example-avlmm-1x1-vhdl-not-working-in/m-p/1516388
or here
Unable to use Avalon-MM master verification BFM in Questa sim - Intel Community
The Problem still exists in Questa 25.1 when using the "-suppress 12110" option it gives this warning:
# ** Error (suppressible): (vsim-12110) All optimizations are disabled because the -novopt option is in effect. This will cause your simulation to run very slowly. If you are using this switch to preserve visibility for Debug or PLI features, please see the User's Manual section on Preserving Object Visibility with vopt. -novopt option is now deprecated and will be removed in future releases.
Without using the "-suppress 12110" and the "-novopt" option all the Avalon BFM models won't work in Questa. Everything is running fine with modelsim.
Are there any plans on fixing this issue?
best regards
Fabian
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Can you attached your design.qar here and the step to duplicate the issue?
I will take a look to see if the fix is needed from our side.
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You can reproduce the issue with the official Intel Avalon Verification IP Suite: 19. Avalon-MM Verilog HDL and VHDL Testbenches
When you execute the testbench without "-novopt" option the testbench gets stuck and won't be fully executed.
When you add the "-novopt" option, you get the described warning.
best regards
Fabian
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I am getting a different error:
** Warning: (vopt-10908) Some optimizations are turned off because the +acc switch is in effect.
# ** Error (suppressible): test_program.sv(229): (vopt-7063) Failed to find 'set_command_address' in hierarchical name '$root.tb.dut.master_0.set_command_address'.
# Region: tb.tp
# ** Error (suppressible): test_program.sv(229): (vopt-7063) Failed to find 'set_command_burst_count' in hierarchical name '$root.tb.dut.master_0.set_command_burst_count'.
# Region: tb.tp
# ** Error (suppressible): test_program.sv(229): (vopt-7063) Failed to find 'set_command_burst_size' in hierarchical name '$root.tb.dut.master_0.set_command_burst_size'.
Will get back to you if i manage to duplicate your error.
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Seems like I was not able to bypass the above error. May I know which version of Quartus that you were using? Can you send your zip design instead?
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I've managed to reproduce this issue in another design of mine using Quartus Standard Edition. At this point, I haven't found a solution. I've reached out to Siemens for a possible workaround—stay tuned for updates.
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thanks for the investigations.
best regards
Fabian
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We manage to find the root cause of the issue:
The modelsim.ini file used in this case was carried over from a previous project, so it didn’t include the latest default settings. As a result, errors like the suppressible vlog-12110 were triggered because the -novopt switch was still active by default.
This occurred because the line VoptFlow = 1 was missing from the modelsim.ini, and the -novopt option has since been deprecated.
In newly generated modelsim.ini files, VoptFlow = 1 is enabled by default to support the vopt optimization flow.
Example from modelsim.ini:
[vsim]
; vopt flow
; Enables automatic design optimization
; Default is enabled
VoptFlow = 1
For more information, there’s also a knowledge base article that explains how to compile “Resource” libraries and how this relates to the vopt flow.
https://support.sw.siemens.com/en-US/product/852852103/knowledge-base/MG527812
I will create an Altera-version Knowledge Base article for the solution discussed above. Based on the conversation, there are currently no plans to automatically enable this option in the modelsim.ini file, as the intention is to maintain flexibility and ensure backward compatibility with modelsim.ini files from older projects.
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Not sure if you have more question? If no, we shall close this thread.
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As we do not receive any response from you on the previous answer that we have provided. Please login to ‘https://supporttickets.intel.com/s/?language=en_US’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.
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Hello,
sorry for the late reply. Actually the solution you proposed did not work.
It does solve the issue with the "-suppress 12110" message. (by the way same as not using the "-novopt" option)
But as I stated in my original request: This causes the Avalon BFM models to get stuck! The testbench will only execute 2 transactions and then gets stuck.
Please compare with these threads:
- https://community.intel.com/t5/Intel-Quartus-Prime-Software/Avalon-Verification-IP-example-avlmm-1x1-vhdl-not-working-in/m-p/1516388
- Unable to use Avalon-MM master verification BFM in Questa sim - Intel Community
So sorry to say that, but we are not any closer to any solution.
best regards
Fabian
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Just to be clear. The problem is not (or not alone) that Questa does not support the -novopt option.
The problem is, that all Avalon BFM do not work with -vopt option. This makes Avalon BFMs unuseable with Questa.
best regards
Fabian
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If that is the case, I think we will need to have a team call to understand your situation from your side,
Kindly check your email on this.
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Kindly take note that I will need some time to investigate on the issue, base in the design that you have attached.
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I manage to duplicate the issue again, I will get back to you once we got some answer on this.
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Please note that I am currently working with Mentor/Siemens to investigate a follow-up issue after applying the initial workaround. I will update you once I have any additional workaround or findings to share.
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Thanks for the update. I'm looking forward to any solutions and/or workarounds
best regards
Fabian
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Just to let you that when we debug this issue with Siemen/Mentor, we found out that this problem does not exist in the command line but only on GUI. They are looking ways to fix this.
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Please take note that this issue is ongoing from Siemens/Mentors
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Kindly take note that this is still in progress with Siemens team.

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