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Hi, I am coding in verilog at switch level. During compilation, my software keeps giving me the following error message.
Error (10015): Verilog HDL unsupported feature error at file "DorQ.v" (line 14): can't synthesize tran, rtran, or tranif bidirectional pass gate primitive What is the problem, shouldn't Quartus be able to synthesize bidirectional pass gate primitives? Please help.Link Copied
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No. Modern fpgas have no internal bidirectional components. If you're trying to write code at the primitive level, I suggest you read the reference manual for the device you are using to see what parts there are.

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