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Can anyone tell me how I can specify that I want to enable the registers/flipflops at the input buffers (ie. use register packing at the I/O buffers) in Quartus II?
I have spent a few minutes searching for this in Q II with no obvious answer. I am currently using the Cyclone II.Link Copied
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Thanks that's indeed what I meant, but the "Fast Input" option disappears if the I/O type is LVDS. Is it not possible to have fast inputs with LVDS?
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You probably have DDR input on those pins too, in Cyclone DDR is done inside the logic fabric and not in the IO-ring so the Fast Input Register is not possible.

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