Using SignalTap over SoC Ethernet

[BHoey]

I found items from 2015/16 for doing remote system debug on Rocketboards and github (links at the end) by placing a "SLD Hub Controller" off the h2f bus in a SoC device. I see references to a AN693 that no longer shows up on the Intel site. That core is in 18.1pro. I'm not seeing it in 19.4pro (Platform Designer). It is in the same directory location.

Is remote debug of sld based tools not supported via SoC? Is there a way to show hidden cores in Platform Designer? Where are old app notes archived?

The latest Debug chapter in the Quartus Pro User Guide suggests there is a way to do this with no details on how ...

2.11.4. Remote Debugging Using the Signal Tap Logic Analyzer

2.11.4.1. Debugging Using a Local PC and an SoC

You can use the System Console with Signal Tap Logic Analyzer to remote debug your Intel FPGA SoC. This method requires one local PC, an existing TCP/IP connection, a programming device at the remote location, and an Intel FPGA SoC.

This is for Arria 10 SX.

https://rocketboards.org/foswiki/Projects/RemoteSystemDebug

https://github.com/byates/altera_sld_hub_driver

[EBERLAZARE_I_Intel]

Hi,

May I know what you mean by the hidden cores?

I will sent the AN693 via Direct Message, you may check your inbox.

Regards.

[EBERLAZARE_I_Intel]

Hi,

Do you have any additional questions?

Please check your inbox regarding the AN693.

[BHoey]

I replied back to you via MyMessages on 3/30.

"The SLD Hub Controller is now hidden and is no longer visible in Platform Designer.

Going from 19.3 to 19.4 the core needed in Platform Designer was moved internal. I need to know why. Replaced or phased out. Is there a way to reveal it?"

[EBERLAZARE_I_Intel]

Hi,

I apologize for missing that message.

I will check with internal team and update to you regarding the visibility of the SLD Hub Controller.

Regards

[BHoey]

Any updates on this?

[BHoey]

Anything?

[EBERLAZARE_I_Intel]

Hi,

I deeply apologize for the delay in response,

Yes, the SLD component in Qsys does not appear by default in the new Platform Editor versions(after 19.3),

However, you can still access it using the following command line invocation:

qsys-edit --debug

Once the tool opens, right-click on any entry in the IP Catalog and select

"Show hidden components"

Once you have the IP save in a .ip file, you can continue to parameterize and use it within the design without using the --debug flag.

Hope this helps, let me know if you have further questions.