VCCIO compatiblity issue with "new" MAX10 project

[Altera_Forum]

I am currently working my way through the NIOS II hardware tutorial project. I unzipped the file and ran through the tutorial. The tutorial is a basic NIOS II processor with only two external I/O's. I have a DECA MAX10 board, with LED's on bank 8 and they are set to 1.2V VCCIO on the schematic. I am using the web version of quartus which could be contributing to my problem. So I build a simple NIOS II processor with a PIO and RAM. when I go to build it. I get an error that says " Error (169193): VCCIO 1.2V is not compatible with the VCCIO requirement of the I/O bank 8 imposed by the selected configuration scheme " It doesn't matter WHAT I set the VCCIO voltage to, it gives me this error. Even when I go into the DEVICE> DEVICE and PINS> CONFIGURATION and select "force vccio to be compatible with I/O voltage" I still get the error, and I can't figure out a way to get rid of it, which really makes me want to switch to a different FPGA supplier since this is my first "go around" with Altera. Keep in mind I started the project that was unzipped from altera and converted from a cyclone project. Somewhere there must be some ghost in the configuration file from the old project. So I started a new project in the same directory with a brand new toplevel design and got the same result. I'm not a swearing person but this is pushing me over the edge.

[Altera_Forum]

Could i get your .pin file from your dir project?

[Altera_Forum]

set_global_assignment -name FAMILY "MAX 10" 

set_global_assignment -name DEVICE 10M50DAF484C8GES set_global_assignment -name TOP_LEVEL_ENTITY niosII_create_hw_dev_tutorial set_global_assignment -name ORIGINAL_QUARTUS_VERSION 15.0.0 set_global_assignment -name PROJECT_CREATION_TIME_DATE "22:04:25 AUGUST 26, 2015" set_global_assignment -name LAST_QUARTUS_VERSION 15.0.0 set_global_assignment -name QIP_FILE qsys1/synthesis/niosII.qip set_global_assignment -name BDF_FILE nios2_quartus2_project.bdf set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0 set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85 set_global_assignment -name DEVICE_FILTER_PIN_COUNT 484 set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8 set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 256 set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (VHDL)" set_global_assignment -name EDA_OUTPUT_DATA_FORMAT VHDL -section_id eda_simulation set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "2.5 V" set_global_assignment -name BDF_FILE niosII_create_hw_dev_tutorial.bdf set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top set_global_assignment -name IOBANK_VCCIO 1.2V -section_id 8 set_location_assignment PIN_C5 -to LED[7] set_location_assignment PIN_C7 -to LED[0] set_location_assignment PIN_B4 -to LED[6] set_location_assignment PIN_A5 -to LED[5] set_location_assignment PIN_C4 -to LED[4] set_location_assignment PIN_B7 -to LED[3] set_location_assignment PIN_A6 -to LED[2] set_location_assignment PIN_C8 -to LED[1] set_location_assignment PIN_M8 -to MAX10_CLK1_50 set_instance_assignment -name IO_STANDARD "1.2 V" -to LED[7] set_instance_assignment -name IO_STANDARD "1.2 V" -to LED[6] set_instance_assignment -name IO_STANDARD "1.2 V" -to LED[5] set_instance_assignment -name IO_STANDARD "1.2 V" -to LED[4] set_instance_assignment -name IO_STANDARD "1.2 V" -to LED[3] set_instance_assignment -name IO_STANDARD "1.2 V" -to LED[2] set_instance_assignment -name IO_STANDARD "1.2 V" -to LED[1] set_instance_assignment -name IO_STANDARD "1.2 V" -to LED[0] set_global_assignment -name ENABLE_OCT_DONE ON set_global_assignment -name EXTERNAL_FLASH_FALLBACK_ADDRESS 00000000 set_global_assignment -name USE_CONFIGURATION_DEVICE OFF set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF set_global_assignment -name FORCE_CONFIGURATION_VCCIO ON set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top

[Altera_Forum]

There's nothing wrong with the set of constraints you've posted. I can successfully use them, as is, to create a project. So, there's something more subtle about your problem. 

 Can you post an archive of your project? Under 'Project' -> 'Archive Project...' and attach the .qar file it generates to the post.  for(ever) - you don't get a .pin file until the Fitter successfully completes.  Cheers, Alex

[Altera_Forum]

yep, nothing wrong in there. See with Mr a_x_h_75

[Altera_Forum]

Yep, here you go...

[Altera_Forum]

hi, 

i spend a little time on your problem, checked an example from altera and i see that your configuration scheme does not correspond to their :  1- go "device" -> device and option pins 2- in "configuration" select "Single Uncompressed image with memory Initialization(512.....) 3- go "general and uncheck all.  this should work now.  I'm sorry, i'm not familiar with max10 fpga, it's flash architecture has specials features to configure it, i don't know (not an expert). (maybe JTAG or internal configurtation stuff) I suggest you to read "https://www.altera.com/en_US/pdfs/literature/hb/max-10/ug_m10_config.pdf", even if i already know you won't ^^  bye.

[Altera_Forum]

Quartus doesn't seem to like the "STRATIX_DEVICE_IO_STANDARD" setting in your constraints (.qsf). You can either remove it or change it to "2.5 V" - the default. The project then compiles successfully. Changing this setting shouldn't have any effect on the result - other than allowing you to get one. That entry is a little unnecessary and can/should be dealt with by adding individual pin and IO standard constraints anyway - as you've done. 

 Regards, Alex

[hansfbaier]

These lines in the .qsf file should fix the problem:

#============================================================
# disable config pin so bank8 can use 1.2V
#============================================================
set_global_assignment -name AUTO_RESTART_CONFIGURATION ON
set_global_assignment -name ENABLE_CONFIGURATION_PINS OFF
set_global_assignment -name ENABLE_BOOT_SEL_PIN OFF