VHDL Package not detected by Modelsim

[ZKhan1]

Hi all ,

I am using Quartus Prime ver 16.0 for compilation of my vhdl project files , the project compiles fine without any errors , but when i start simulation the Modelsim cantt seem to find my package file .

Modelsim version : ModelSim ALTERA STARTER EDITION 10.4d

Although i made a "work" folder myself and pasted the vhdl package in it , but still no effect , then i copied the folder and pasted it in D:\Quartus_projects\i2c_audio_Fir_filtr1p1\simulation\modelsim

 Still i get this error :

# vcom -93 -work work {D:/Quartus_projects/i2c_audio_Fir_filtr1p1/source/tb_audio_ctrl_Top.vhd}
# Model Technology ModelSim ALTERA vcom 10.4d Compiler 2015.12 Dec 30 2015
# Start time: 15:50:44 on Mar 07,2022
# vcom -reportprogress 300 -93 -work work D:/Quartus_projects/i2c_audio_Fir_filtr1p1/source/tb_audio_ctrl_Top.vhd
# -- Loading package STANDARD
# -- Loading package TEXTIO
# -- Loading package std_logic_1164
# -- Loading package std_logic_arith
# -- Loading package STD_LOGIC_UNSIGNED
# -- Loading package NUMERIC_STD
# ** Error: (vcom-11) Could not find work.audio_codeci2c_pkg.
#
# ** Error (suppressible): D:/Quartus_projects/i2c_audio_Fir_filtr1p1/source/tb_audio_ctrl_Top.vhd(11): (vcom-1195) Cannot find expanded name "work.audio_codeci2c_pkg".
#
# ** Error: D:/Quartus_projects/i2c_audio_Fir_filtr1p1/source/tb_audio_ctrl_Top.vhd(11): Unknown expanded name.
# ** Error: D:/Quartus_projects/i2c_audio_Fir_filtr1p1/source/tb_audio_ctrl_Top.vhd(13): VHDL Compiler exiting
# End time: 15:50:44 on Mar 07,2022, Elapsed time: 0:00:00
# Errors: 4, Warnings: 0
# ** Error: C:/altera_lite/16.0/modelsim_ase/win32aloem/vcom failed.
# Error in macro ./Audio_FIR_filter_run_msim_rtl_vhdl.do line 74
# C:/altera_lite/16.0/modelsim_ase/win32aloem/vcom failed.
# while executing
# "vcom -93 -work work {D:/Quartus_projects/i2c_audio_Fir_filtr1p1/source/tb_audio_ctrl_Top.vhd}"

In my Top vhdl file and in my testbench i have declared it like this :

LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
-- USE IEEE.std_logic_arith.ALL;
USE ieee.std_logic_unsigned.all;
USE ieee.numeric_std.ALL;
use ieee.math_real.all;
USE std.textio.ALL;

Library work;
use work.audio_codec_i2c_pkg.all;

Any clue why modelsim is not able to open it ???

[SyafieqS]

Hi Ahmed,

Looking back at your message, I see you are using vmap command. Use command vmap -c in the command-line window to copy the modelsim.ini file from the installation directory to the current working directory and see if the libraries mapping, startup file and default setting issue can be resolved instead of vmap only. If you do not use this command, all library mappings will be made to the modelsim.ini file in the installation directory. Altera recommends that you use vmap -c at the start of every new project.

Let me know any update.

[SyafieqS]

Ahmed,

Let me know if there is any update at your end

[ZKhan1]

No it is not working:

vsim -t 1ps -L altera -L lpm -L sgate -L altera_mf -L altera_lnsim -L cycloneive_ver -L cycloneive -L rtl_work -L work -L Fir_left_ch -voptargs="+acc" tb_audio_ctrl_Top.vhd
# vsim -t 1ps -L altera -L lpm -L sgate -L altera_mf -L altera_lnsim -L cycloneive_ver -L cycloneive -L rtl_work -L work -L Fir_left_ch -voptargs=""+acc"" tb_audio_ctrl_Top.vhd
# Start time: 09:16:35 on Apr 15,2022
# ** Error: (vsim-19) Failed to access library 'tb_audio_ctrl_Top' at "tb_audio_ctrl_Top".
#
# No such file or directory. (errno = ENOENT)
# Error loading design
# Error: Error loading design
# Pausing macro execution
# MACRO ./Audio_FIR_filter_run_msim_rtl_vhdl.do PAUSED at line 76
vmap -c
# Model Technology ModelSim ALTERA vmap 10.4d Lib Mapping Utility 2015.12 Dec 30 2015
# vmap -c
# ** Warning: vmap will not overwrite local modelsim.ini.

[SyafieqS]

Hi Ahmed,

Can you us latest Quartus version of your supported device and seem if the issue still persist.

As latest build have many bugs fixed.

Let me know on this.

[SyafieqS]

Ahmed,

Let me know if there is any update.

[SyafieqS]

We do not receive any response from you to the previous question/reply/answer that I have provided, thus I will put this case to close pending. Please post a response in the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you with your follow-up questions.