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VHDL language construct synthesis

Altera_Forum
Honored Contributor II
‎02-01-2013 05:13 AM
1,056 Views

Hi all, 

 

I am looking for a document which specifies which constructs in the VHDL language ALTERA synthesizes. 

 

Is ALTERA capable of synthesizing a function or procedure with a defined register or only it can infer combinational hardware in functions/procedures. I want to create a library of commonly used hardware (Sequential) and call it via a function/procedure. 

 

Thanks very much. 

 

Jozamm
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Altera_Forum
Honored Contributor II
‎02-01-2013 08:58 AM
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The answer is usually combinatorial, but the registers would come if you placed the function/procedure inside a clocked process. 

If there any reason you want to use functions/procedures? Using these does not allow any pipelining in the function/procedure, so you're taking away the greatest power to increase your FMax. 

 

Anyways, procedures are fairly redundant in synthesisable code because of the fact you can only really scribe combinatorial logic in them. THey are way more useful in testbenches (where you can make one procedure emulate an entire bus transaction).
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