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Verilog file not automatically generated by the SOPC builer in quartus II

Altera_Forum
Honored Contributor II
1,644 Views

Hello, 

 

I am new to working with FPGA and am using an ALTERA DEO NANO Cyclone IV E development board. I was following the steps of the DEO NANO user manual v1.7 for making a Nios II project. And in the step where it says to click the generate button in the sopc builder a verilog file is not automatically created. Therefore I cannot go to the next steps. And even though it says the "system generation was successful" in the end it displays the below Information beforehand? I checked and rechecked the steps I followed but couldn't come up with a solution. 

 

Info: Wrote C:/Users/Documents/Altera (FPGA)/db/DEO_NANO_SOPC.sopcinfo 

Info: DEO_NANO_SOPC: Wrote C:\Users\Documents\Altera (FPGA)\db/DEO_NANO_SOPC.html 

Info: DEO_NANO_SOPC: Generating QIP file. 

Info: Starting PTF file elaboration. 

/usr/bin/sh: -c: line 0: syntax error near unexpected token `(' 

/usr/bin/sh: -c: line 0: `. H:/altera/10.1/quartus/sopc_builder/bin/nios_sh ; H:/altera/10.1/quartus/sopc_builder/bin/sopc_builder --classic --no_splash --refresh C:/Users/Documents/Altera\ (FPGA)/db/DEO_NANO_SOPC.ptf' 

Info: Finished elaborating PTF file. 

Executing: H:/altera/10.1/quartus//sopc_builder/bin/sopc_builder --classic --generate C:/Users/Documents/Altera (FPGA)/db/DEO_NANO_SOPC.ptf 

Info: Starting generation... 

/usr/bin/sh: -c: line 0: syntax error near unexpected token `(' 

/usr/bin/sh: -c: line 0: `. H:/altera/10.1/quartus/sopc_builder/bin/nios_sh ; H:/altera/10.1/quartus/sopc_builder/bin/sopc_builder --classic --generate C:/Users/Documents/Altera\ (FPGA)/db/DEO_NANO_SOPC.ptf' 

Info: System generation was successful. 

 

Can anyone tell me how I should proceed in order to complete the project?
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Altera_Forum
Honored Contributor II
747 Views

The Altera tools can't deal with spaces or () anywhere in the path. You need to delete this project and start again with a path other than Altera (FPGA). Altera-FPGA would work fine. Renaming the directory may or may not work.

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Altera_Forum
Honored Contributor II
747 Views

Thank you very much Galfonz. Your instructions were correct and I could overcome that problem. :):):) But unfortunately I encountered another error while compiling. :( 

 

Error: Node instance "DE0_NANO_SOPC_inst" instantiates undefined entity "DE0_NANO_SOPC" 

 

Here also I checked and rechecked my steps with the tutorial. Further i added the DEO_NANO_SOPC.v file to the project files. And checked the top level entity to make sure. But nothing did work. Can you tell me what this error means?
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Altera_Forum
Honored Contributor II
747 Views

I'd recommend starting with the example in the My_First_NiosII_Qsys.pdf file. Qsys is the replacement for SOPC builder which is now out of date. Qsys is easier to use as well. You may need to download the latest CD zip file for the DE0 nano board. The QSYS project may not be on the CD shipped with the board. Make sure you download the latest Quartus software as well.

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