Verilog interview questions

[Altera_Forum]

Hey guys was wondering what you think basic entry level positions would quiz you on an interview. I know I could do well but I am nervous as hell.

[Altera_Forum]

Well it depends. I have been myself on the other side and I know how it feels when changing seats. The interviewer may not be verilog or HDL expert and in that case they may have some sample code segments and ask your opinion or what is wrong (they got answers prewritten). This exercise is not easy at interviews and expect the code segments to be very simple, Or they just chat you you up about how great they are and how their products are doing well.  

 In general, you will need to know basics of the language use e.g. IF declaration, instantiation, variables, parameters, number formats, assignments, loops, functions, tasks. Don't worry about specific details of application area as everybody knows what they are doing now and forgets it later.  Another general advice is that when asked any question don't always think there is a hidden secret or ambush to find out.

[Altera_Forum]

Thanks alot for your reply, its going to be a phone interview.

[Altera_Forum]

Like kaz said they shouldn't go too in depth. They should be looking to see if you have the concepts down, if you accidentally explain something using C or VHDL for example someone like myself would see that as a strength and that you haven't memorized the language like a robot (I prefer thinkers who can google syntax rather than robots that only know syntax :)) 

 Since it's a phone interview I would have a verilog reference card in front of you in case you can't remember a specific verilog structure. Some interviewers actually expect you to know syntax so the card might help in those cases.... then again if they are that sadistic I'm not sure if I would want to work for them :) One of the things I asks during interviews is to explain the difference between blocking and non-blocking operators and when to use each. If they get that one wrong it usually means one of two things A) they haven't really used verilog/VHDL much or B ) they probably have poor coding habits.

[Altera_Forum]

Thanks the notecard is great idea.. and I have been using nothing but C over the summer so I may say think in C

[Altera_Forum]

--- Quote Start ---  One of the things I asks during interviews is to explain the difference between blocking and non-blocking operators and when to use each. If they get that one wrong it usually means one of two things A) they haven't really used verilog/VHDL much or B ) they probably have poor coding habits.  --- Quote End ---    I believe VHDL doesn't know 'blocking or non-blocking assignments' see this http://www.sigasi.com/content/vhdls-crown-jewel (http://www.sigasi.com/content/vhdls-crown-jewel) So a perfectly expert VHDL programmer probably doesn't know (or perhaps couldn't care less) what 'blocking or non-blocking' is all about. (except that he may have to tweak/debug some Altera example/driver code ...)

[Altera_Forum]

I've lead only a couple of interviews but I find the best questions don't focus on VHDL/Verilog/System Verilog but instead focus on tangible logic building blocks such as gates/counters/flip-flops etc. For example a question I like to ask is the following: 

 How would you achieve the function of a two input XOR gate using only a multiplexer and one other logic gate (not including XOR gate!)?  Removing the constraints of the VHDL nuances means you can actually figure out if a candidate has a logical approach to problems - whether the problems are VHDL or otherwise.

[Altera_Forum]

I do the same since I'd rather have a problem solver on my team rather than someone who can just memorize syntax/details. I don't even mind if someone accidentally mixes C and verilog for example, as long as they can demonstrate that they grasp the concept that's fine by me. When a candidate admits they they are rusty with a language I just have them jump to psuedo coding since I value problem solving over syntax. 

 The following equation summarizes my opinion of a candiate skill set :)  Problem solver + google > human encyclopedia