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Please some help with this code, I dont know where is the problem, is giving me these errors:
Error: Node instance "TLong" instantiates undefined entity "OneShot" Error: Node instance "TShort" instantiates undefined entity "OneShot" here is the code... library ieee; use ieee.std_logic_1164.all; use IEEE.STD_LOGIC_UNSIGNED.ALL; entity TimerCircuits is port (LongTrig, ShortTrig, Clk: in std_logic; TS,TL : buffer std_logic); end entity TimerCircuits; architecture TimerBehavior of TimerCircuits is component OneShot is port (enable, Clk : in std_logic; Duration : in integer range 0 to 25 ; QOut : buffer std_logic ); end component OneShot; signal SetCountLong, SetCountShort: integer range 0 to 25; begin SetCountLong <= 25; SetCountShort <=4; TLong:OneShot port map (enable=>LongTrig, Clk=>Clk, Duration=>SetCountLong, QOut=>TL); TShort:OneShot port map (enable=>ShortTrig, Clk=>Clk, Duration=>SetCountShort, QOut=>TS); end architecture TimerBehavior;Link Copied
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Perhaps a stupid question:
do you have a "OneShot.vhd" - File? I get the same Error if I remove the VHDL-File for a component from my project-folder.- Mark as New
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The error indicates you havent included the oneshot.vhd file
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