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Honored Contributor I

Warning: Tri-state nodes do not directly drive top-level pins

Hello, I am having an issue. I created a block with several tri-states to create an in and out enables for 8 bit registers that are all connected on the same rail, and then the enables were to be controlled by a single multiplexer. But I keep getting the error "Warning: Tri-state nodes do not directly drive top-level pins" and then it appears that it then converts all the tri-states to an OR gate. How can I fix this? Thanks

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Honored Contributor I

FPGA devices don't support internal tristate drivers, so that is why you are getting this warning. Driving I/Os external to the chip is possible with tristate drivers, but this is not possible for internal nodes. 


So the synthesizer/mapper is converting the tristate functionality to a wide-input OR gate with per-bit enables (high number of drivers) or a mux selector (low number of drivers). The logic should perform the identical function, there is nothing for you to do, really. 


If you want to get rid of the message, then you have to convert the internal tristate buffers yourself into the equivalent logic. For example: 


reg a, b, c, d; wire ea, eb, ec, ed; wire bus; // tristate assign bus = ea ? a : 'bz; assign bus = eb ? b : 'bz; assign bus = ec ? c : 'bz; assign bus = ed ? d : 'bz; // OR gate, priority encoded assign bus = ea ? a : (eb ? b : (ec ? c : (ed ? d : 0)));