Warning during compilation

[Altera_Forum]

Hi all, 

I've found some warnings, like these two:   

• warning: some pins have incomplete i/o assignments. refer to the i/o assignment warnings report for details 

 

• warning: no exact pin location assignment(s) for 5 pins of 5 total pins info: pin clk_o not assigned to an exact location on the device info: pin en_o not assigned to an exact location on the device info: pin ref_clk_i not assigned to an exact location on the device info: pin reset_i not assigned to an exact location on the device info: pin clk_i not assigned to an exact location on the device 

 Where am I going wrong?

[Altera_Forum]

you're not assigning pins to top level signals. If you dont assign them specific pins, Quartus will assign them randomly (and appropriatly, so clocks should be assigned to clock pins). 

 Use the assignments editor to do this.

[Altera_Forum]

Perfect, I've assigned PINS, but now making "Start I/O Assignment Analysis", 've found this error: 

 warning: timing-driven compilation is disabled - timing performance will not be optimized.   What have I forgotten?

[Altera_Forum]

This is probably because you do not have a timing constraints file. You can create one using timequest.

[Altera_Forum]

how can I do? 

can u post me here a .sdc file as an example?