What is needed to re-generate a .pof file?

[Altera_Forum]

Hello, I am new to Quartus II so, I'm hoping someone could provide a little light. I have an old .pof file of which I only have the original verilog source code. I would like to modify the verilog code and regenerate the .pof file. Are there any other files that are required (at minimum) inorder to create the .pof file? Again, I only have access to the original verilog files and do not know what, if any, other files were used.

[Altera_Forum]

The primary files you are missing is the .SDC file and the .QSF file. 

 The .SDC contains the timing constraints and can be recreated if you know the timing requirements of the design.   The .QSF file contains all the quartus settings for the compile, include what files were called, and the IO assignments for the design. This too can be re-generated by just starting a new project with the files and adding all the source files, and defining the pinout.  If there were some advanced features used to meet timing, like logic locks etc, those would be lost, but you should be able to generate a POF fairly easily.   Pete

[Altera_Forum]

Thank you.