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Beginner
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Why is the total used logic elements 0%?

fpga.png

Is there anyone could help? Thanks.

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Hi,

 

Already discussed in old thread

https://forums.intel.com/s/question/0D50P00003yyM5NSAU/help-compilation-successful-but-zero-logic-el...

 

Quartus synthesizer removes all logic whose outputs are unused/constant/unchanged/if nothing is routed out of the chip.

 

If possible can you Share your design code?

 

Let me know if this has helped resolve the issue you are facing or if you need any further assistance.

 

Regards

Anand

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