Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)

Width mismatch error

MR23
Beginner
1,002 Views

Hi there,

I am trying to add four 8-bit adder to create a 32-bit adder. As you can see, I am having issues as A[7..0] is going to A[31..0]. Same error for B input. However, I am not getting any error for Sum output (bottom line). How to fix this problem?

Thanks.

 

 

Width_mismatch_Error.png

 

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ShengN_Intel
Employee
979 Views

Hi,

 

Same thing have to be done on A, B like the Sum. For the bus line from A[7..0] and B[7..0], have to Right-click -> properties -> Give name like A[7..0], A[15..8], A[23..16], A[31..24] for each inst. Same things goes for B.

 

Thanks,

Best Regards,

Sheng

p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.

 

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2 Replies
ShengN_Intel
Employee
980 Views

Hi,

 

Same thing have to be done on A, B like the Sum. For the bus line from A[7..0] and B[7..0], have to Right-click -> properties -> Give name like A[7..0], A[15..8], A[23..16], A[31..24] for each inst. Same things goes for B.

 

Thanks,

Best Regards,

Sheng

p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.

 

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MR23
Beginner
945 Views

Thanks. It worked!

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