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17268 Discussions

altmult_add megafunction

Altera_Forum
Honored Contributor II
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I am using the following: 

1. quartus 11.1 sp2 

2. modelsim altera starter edition 10.0c 

3. arria v 

 

i have created an altmult_add using the megawizard, and the following was created: 

 

component fakir_1_altmult_add_coef 

PORT 

aclr0 : IN STD_LOGIC := '0'; 

clock0 : IN STD_LOGIC := '1'; 

coefsel0 : IN STD_LOGIC_VECTOR (2 DOWNTO 0); 

dataa_0 : IN STD_LOGIC_VECTOR (11 DOWNTO 0) := (OTHERS => '0'); 

datab_0 : IN STD_LOGIC_VECTOR (11 DOWNTO 0) := (OTHERS => '0'); 

ena0 : IN STD_LOGIC := '1'; 

result : OUT STD_LOGIC_VECTOR (15 DOWNTO 0) 

); 

end component; 

 

i am using this component in my design, but when i try simulating it i recieve the following warning in the modelsim: 

 

** Warning: (vsim-3473) Component instance "altera_mult_add1 : altera_mult_add" is not bound.# Time: 0 ps Iteration: 0 Instance: /fakir_calc_tb/fakir_1_altmult_add_coef_1/fakir_1_altmult_add_coef_mult_add_3fh4_component File: C:/Repositories/HD3.0/RedTailedHawk/RTL/IWP/fakir/fakir_calc/fakir_1_altmult_add_coef.vhd 

 

and the simulation results in an 'U' output from this component, i can't find the reason for it. 

 

help is requiered. 

 

Thanks.
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7 Replies
Altera_Forum
Honored Contributor II
1,390 Views

sounds like you havent added the source file for the alt mult add to your project. WHat you show is just the component declaration.

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Altera_Forum
Honored Contributor II
1,390 Views

 

--- Quote Start ---  

sounds like you havent added the source file for the alt mult add to your project. WHat you show is just the component declaration. 

--- Quote End ---  

 

 

i have 2 files for the simulation: 

1. test bench file, in which the component altmult_add is declared as: 

 

component fakir_1_altmult_add_coef 

PORT 

aclr0 : IN STD_LOGIC := '0'; 

clock0 : IN STD_LOGIC := '1'; 

coefsel0 : IN STD_LOGIC_VECTOR (2 DOWNTO 0); 

dataa_0 : IN STD_LOGIC_VECTOR (11 DOWNTO 0) := (OTHERS => '0'); 

datab_0 : IN STD_LOGIC_VECTOR (11 DOWNTO 0) := (OTHERS => '0'); 

ena0 : IN STD_LOGIC := '1'; 

result : OUT STD_LOGIC_VECTOR (15 DOWNTO 0) 

); 

end component; 

 

and instanciated as: 

 

fakir_1_altmult_add_coef_1: fakir_1_altmult_add_coef 

port map ( 

aclr0 => reset_calc_signal, 

clock0 => clk_signal, 

coefsel0 => "000", 

dataa_0 => dataa_0_signal, 

datab_0 => dataa_1_signal, 

ena0 => ena0_signal, 

result => result_signal); 

 

2. the megawizard generated .vhd file of this component.
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Altera_Forum
Honored Contributor II
1,390 Views

Aha, now I read in more detail. altera_mult_add annoyingly is not in the default altera libraries, you have to add the altera_insim_components to your modelsim project, and or create a library for it. 

 

you can find the altera_insim_components.vhd in: 

<quartus install dir>/eda/sim_libs/ 

 

I also suggest you raise an enhancement request via mysupport to fix this - its very annoying.
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Altera_Forum
Honored Contributor II
1,390 Views

thanks, i will try it! 

by the way, i am using arria v.
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Altera_Forum
Honored Contributor II
1,390 Views

trued it, added the altera_insim_components.vhd to the modelsim project, still didnt work... 

could it be related in any way to the fact that i m using the modelsim starter edition?
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Altera_Forum
Honored Contributor II
1,390 Views

copy this file to sim project directory  

C:\altera\13.0sp1\quartus\libraries\megafunctions\altera_mult_add_rtl.v 

 

and rename the module to altera_mult_add, add this .v file to modelsim project.
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Altera_Forum
Honored Contributor II
1,390 Views

i feel Xilinx flow is much easier than Altera one, this takes me 1 hr to find out :(

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