assign verilog generic in tcl

[s002wjh]

so if i want assign value to a generic. it seem i can do 2 ways, just curious whats the difference?

set_global_assignment -name VERILOG_MACRO "test=5"

or

set_parameter -name test 5

[Nurina · Accepted solution]

Hi,

I'm assuming you're assigning the value to the generic at a project-wide setting. There is no difference in writing those two tcl commands that way.

With set_parameter, you have the option to set your parameters at both project-wide or non project wide settings. Detailed information about set_parameter can be found here: https://www.intel.com/content/www/us/en/programmable/quartushelp/13.0/mergedProjects/tafs/tafs/tcl_pkg_project_ver_6.0_cmd_set_parameter.htm

As suggested by the command, the set_global_assignment can only be used for project-wide (global) assignments. Detailed information here: https://www.intel.com/content/www/us/en/programmable/quartushelp/13.0/mergedProjects/tafs/tafs/tcl_pkg_project_ver_1.0_cmd_set_global_assignment.htm

Regards,

Nurina

[Nurina]

Hi,

I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.

Regards,
Nurina

PS: If you find any comment from the community or Intel Support to be helpful, feel free to give Kudos.