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I am trying to use assignment groups to simplify my SDC file. But I am having problems getting them to work.
I have SDC code as follows (simplified obviously, the group will eventually add additional wildcard patterns in):assignment_group "test" -remove ;# need this to avoid iterative workflow continually appending to the group
assignment_group "test" -add_member data_out\
set_multicycle_path -setup -from "test" -to $main_clk 2
However when I load the SDC file, Timequest throws the following warning: Warning: Ignored assignment set_multicycle_path Warning: Argument -from with value test could not match any element of the following types: ( clk kpr reg port pin cell partition ) From what I can tell I am following Altera's example, but it is being ignored. An example from Altera's documentation is as follows:
assignment_group "src_group" -add_member reg1
assignment_group "src_group" -add_member reg2
set_multicycle_assignment 2 -setup -from "src_group"
for reference, the following code works correctly as I would expect:
set_multicycle_path -setup -from ] -to $main_clk 2
I have several wildcard patterns that I want to apply this same constraint to and I really don't want to have to copy/paste this line every time due to the potential for errors it has. Additionally this group will have some other constraints applied and again I want to have the list present in a single location and then reference that list in all the various constraints that need it. Thank You.
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I was able to resolve. I should mention this is for the 7.2 SP3 tools.
Resolution was: Groups are defined in the qsf file. In the quartus project, add the signals for a given interface to an assignment group (Assignments->Assignment Groups). Then you can call the assignment group from the SDC as follows:
# SDO
set_input_delay -clock_fall -min -clock adc_clk $adc_i_min
set_input_delay -clock_fall -max -clockadc_clk $adc_i_max
set_multicycle_path -setup -from
-to $main_clk
16
set_multicycle_path -hold -from
-to $main_clk
15

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