cfi_flash

[Altera_Forum]

Hi everybody; 

 i am newbie and have Nios II Embedded Evaluation Kit, Cyclone III edition.   i am trying to add extra memory slot and added cfi_flash and sdram on my SOPC design.  But in quartus II 8.0, i need to use pin planner but i dont know where pins are need to be connected.  Thanks for help.

[Altera_Forum]

Look at In schematics of Nios II Embedded Evaluation Kit, Cyclone III edition .... in Altera web site (a little hard to find, but they exist).

[Altera_Forum]

As you said it is hard to find and im newbie

[Altera_Forum]

altera web site > products > dev ktis > all dev kits > nios ii...cyclone iii edition > (http://www.altera.com/products/devkits/altera/kit-cyc3-embedded.html) 

Is it yours ?  If yes, you will see et the bottom, design files (http://www.altera.com/literature/tt/neek_sopc_builder_hw_lab.zip) ;-)

[Altera_Forum]

Answer is yes and im now looking on Documentations but again as you said it is hard to find pins usage 

 i downloaded the files you linked. im going to work on them. i hope to find something useful  thanks for reply.

[Altera_Forum]

i looked the files and they are built in quartus 2 9.0 but im using 8.0

[Altera_Forum]

Look at .qsf file in the project. You can open it with notepad.you will find pin locations to cfi_flash

[Altera_Forum]

it may be silly but i need to ask. 

 this design and documentation has 2 dqs pins but when i opened my design's pin planner there are 4 dqs pins appears.  do you have any idea?

[Altera_Forum]

Maybe DDR sdram is not the same. 

I read again your 1st post (http://www.alteraforum.com/forum/showpost.php?p=114697&postcount=1), What do you mean by "to add extra memory slot and added cfi_flash and sdram on my SOPC design." ? Do you mean a 2nd DDR SDRAM ? Do you design your own board from this dev kit ?

[Altera_Forum]

--- Quote Start ---  it may be silly but i need to ask.  this design and documentation has 2 dqs pins but when i opened my design's pin planner there are 4 dqs pins appears.  do you have any idea?  --- Quote End ---    If your dqs pins are ending with 'n' and 'p' they are differential. Very likely for DDR.  In that case, one dqs signal need 2 pins (one 'p' and one 'n').  Cheers, Ton

[Altera_Forum]

Nope. 

 SOPC design is attached.

[Altera_Forum]

Thanks Ton; 

 Can you explain what do you mean with "one dqs signal need 2 pins" ?  What should be the connections to these dqs pins?

[Altera_Forum]

What I mean is that DQS signal are usually differential. This means you need 2 conductors in a pair to connect one signal. For a comprehensive explanation check: http://zone.ni.com/devzone/cda/tut/p/id/3407#toc2 

 good luck, Ton