compilation error

Altera_Forum · ‎10-25-2007

Hi i am getting the following error during compilation cu any one help me plz

XLXI_33 : carry_ripple

port map (A(15 downto 0)=>XLXN_112(15 downto 0),

B(15 downto 0)=>XLXN_113(15 downto 0),

C_0=>XLXI_33_C_0_openSignal,

C_15=>open,

S(15 downto 0)=>XLXN_114(15 downto 0));

Error: Actual width (16) of port "A" on instance "carry_ripple:XLXI_33" is not compatible with the formal port width (36) declared by the instantiated entity

Altera_Forum · ‎10-25-2007

Generally means you have a port width mismatch.

A in the snippet above is defined as 15 downto 0, or 16 bits. Wherever you define the entity, you must have that corresponding port defined as 36 bits.

Altera_Forum · ‎10-25-2007

Thanks M.r stevie now i got it now its compiled ..............

rgds

rav