Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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compiling at different frequencies

mahender
Novice
652 Views

How can i compile my design at various frequencies in quartus prime pro and see the resource utilizations for corresponding frequencies. please help me with this.

 

Thanks in advance....!

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5 Replies
SyafieqS
Moderator
633 Views

Mahender,


What I can think of is you can manually duplicate the design and change the frequency in sdc in each of the duplicated design according to what speed you wanna run.


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mahender
Novice
632 Views

@SyafieqS ,

will changing the clock frequency in sdc file effect the resource utilization or it only for timing analysis like for setup and hold time violations info.

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SyafieqS
Moderator
594 Views

I believe it only affect for timing analysis setup and hold.


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sstrell
Honored Contributor III
590 Views

Instead of manually duplicating your whole project, use the Revisions feature, using the same design files for each revision, and specify a different .sdc file for each revision.

Resource utilization will not be different unless different optimizations are performed in order to meet timing, which is entirely possible depending on what you're trying to do.

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SyafieqS
Moderator
552 Views

Mahender,


May I know if there is any update/concern on this?


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