Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)

counter

Altera_Forum
名誉コントリビューター II
1,133件の閲覧回数

I am currently using de1 board and Altera quartus II software. as a beginner to digital design, I am learning by going through the Altera lab exercise. I am stacked on trying to design a 4bit t ff based counter. my code counts up to7 without problem but it won't go further I was intending to count from 0 to 15 by instantiating my t ff 4 times as shown in the code below. Will you pleas help identifying my error? 

 

module counter_4bit(q, En, Clk, Clr, ); 

input En, Clk, Clr; 

output [0:4] q; 

 

wire [0:2] temp; 

 

tflipflop T0(q[0], En, Clk, Clr); 

tflipflop T1 (q[1], q[0], Clk, Clr); 

and(temp[0], q[1], q[0]); 

tflipflop T2 (q[2], temp[0], Clk, Clr); 

and(temp[1], q2, q1, q0); 

tflipflop T3 (q[3], temp[1], Clk, Clr); 

 

 

 

endmodule 

 

module tflipflop(Q, t, Clk, Clr); 

input t, Clk, Clr; 

output reg Q; 

initial Q = 0; 

always @(posedge Clk) 

if(Clr) 

Q = 0; 

else  

Q = Q ^ t; 

endmodule
0 件の賞賛
1 返信
Altera_Forum
名誉コントリビューター II
496件の閲覧回数

The second AND has typo at q2, q1 and q0.  

They should be q[2], q[1], and q[0]. Without the brackets, the identifiers are treated unrelated to q[0:4].
返信