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create_generated_clock question

Altera_Forum
Honored Contributor II
1,419 Views

Hi all! 

 

I have a 120MHz clock coming into my design. I use this clock on register (called CLK_60) to divide it by 2, to create a 60MHz clock. 

I believe I have constrained things correctly, but I get a warning that CLK_60 was found without an associated clock assignment. 

 

Here's what I have in my .sdc: 

 

create_clock -name CLK_I_120 -period 8.33333 [get_ports CLK_I_120] 

create_generated_clock -divide_by 2 -name CLK_60 -source [get_pins CLK_60|clk] 

 

 

Can anyone tell me where I might be going wrong? 

 

 

Thanks!
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Altera_Forum
Honored Contributor II
744 Views

Hi Awann, 

 

You do not tell which clock has to be used as the source for the generated clock. You may try this: 

create_generated_clock -divide_by 2 -name CLK_60 -source [get_ports CLK_I_120] [get_pins CLK_60|clk] 

 

Grtz, 

 

Richard.
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Altera_Forum
Honored Contributor II
744 Views

I realized I did not add the target to my.sdc file. 

 

So I changed the line to: create_generated_clock -divide_by 2 -name CLK_60 -source [get_pins CLK_60|clk] CLK_60 

 

That fixed things, and taught me that proper caffeine levels should be achieved before attempting to write constraint files.
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