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Altera_Forum
Honored Contributor I
1,011 Views

de0 Nano ADC interfacing

Hi all, 

 

Im trying to interface with the ADC on the de0 nano, with a simple program to start with: 

-Turn on LEDs if ADC value > 1.5V 

-Turn off LEDs if ADC value <= 1.5V 

 

It seems that I have something fatally wrong with my program, as my LEDs get turned on every time with 0V going into the adc. They even turn on if I flip the < and >= sign; meaning something must be very wrong indeed. 

 

The following snippits are all from the same Module, which compiles and transfers fine to the fpga 

Im using page 3 of this document as a reference: 

ftp://ftp.altera.com/up/pub/altera_material/12.1/tutorials/de0-nano/using_de0-nano_adc.pdf 

 

 

I basically have three "events": 

-Posedge of master clock: (1) generate clock signal for adc, manage cs signal going to adc 

-posedge of adc clock: (1)write led values (2) read adc bits 

-negedge of adc clock: (1) write adc channel number to adc 

 

First, the inputs/outputs and the local vars: 

module blinky2 (input clk, output reg led, //output to led output reg sclk, //clock signal for adc, generated by this module output reg cs=1, //communication channel to adc, input dout, //data from adc output reg din); //communication to adc, for channel selector //local variables reg counter=1; reg adcClkCycNum=0;//the adc cycle number, 16 step process. reg adcChNum=0;//the ADC channel number for use with din; set to 0 for now reg adcSample=0;//12 bits for storing the digitized adc sample  

 

 

Next, the generation of the sclk signal, which is the clock signal provided to the adc: 

Merged into this is also management of the CS signal, which needs to be changed on both the positive and negative edge of the adc clock signal (so we manage it here, instead of on posedge/negedge of adc clock signal. 

always @ (posedge clk) begin if (counter == 1) begin counter <= 25; //dividing the master clock clk by 25 to generate adc clock signal if (adcClkCycNum == 0) //cs must be set low on the lower edge of cycle 0 begin if (sclk == 1) begin cs<=0; end end if (adcClkCycNum == 15)//cs must be set high on the rising edge of cycle 15 begin if (sclk == 0) begin cs<=1; end end sclk <= ~sclk; end else begin counter <= counter -1; end end  

 

 

Next, the things that happen on the positive edge of the adc clock: 

This includes reading the sample from the adc, and setting the LEDs 

always @ (posedge sclk) begin if (adcClkCycNum == 0) begin if (adcSample==150) begin led<=250; end adcClkCycNum<=1; end if (adcClkCycNum == 1) begin adcClkCycNum<=2; end if (adcClkCycNum == 2) begin adcClkCycNum<=3; end if (adcClkCycNum == 3) begin adcClkCycNum<=4; end if (adcClkCycNum == 4) begin adcSample<=dout; adcClkCycNum<=5; end if (adcClkCycNum == 5) begin adcSample<=dout; adcClkCycNum<=6; end if (adcClkCycNum == 6) begin adcSample<=dout; adcClkCycNum<=7; end if (adcClkCycNum == 7) begin adcSample<=dout; adcClkCycNum<=8; end if (adcClkCycNum == 8) begin adcSample<=dout; adcClkCycNum<=9; end if (adcClkCycNum == 9) begin adcSample<=dout; adcClkCycNum<=10; end if (adcClkCycNum == 10) begin adcSample<=dout; adcClkCycNum<=11; end if (adcClkCycNum == 11) begin adcSample<=dout; adcClkCycNum<=12; end if (adcClkCycNum == 12) begin adcSample<=dout; adcClkCycNum<=13; end if (adcClkCycNum == 13) begin adcSample<=dout; adcClkCycNum<=14; end if (adcClkCycNum == 14) begin adcSample<=dout; adcClkCycNum<=15; end if (adcClkCycNum == 15) begin adcSample<=dout; adcClkCycNum<=0; end end  

 

 

And finally, the events that occur on the negative edge of the adc clock: 

This includes sending the adc channel number to the adc in steps 2-4 

always @ (negedge sclk) begin if (adcClkCycNum == 0) begin end if (adcClkCycNum == 1) begin end if (adcClkCycNum == 2) begin //adc channel number, addr2 din<=adcChNum; end if (adcClkCycNum == 3) begin //adc channel number, addr2 din<=adcChNum; end if (adcClkCycNum == 4) begin //adc channel number, addr2 din<=adcChNum; end if (adcClkCycNum == 5) begin end if (adcClkCycNum == 6) begin end if (adcClkCycNum == 7) begin end if (adcClkCycNum == 8) begin end if (adcClkCycNum == 9) begin end if (adcClkCycNum == 10) begin end if (adcClkCycNum == 11) begin end if (adcClkCycNum == 12) begin end if (adcClkCycNum == 13) begin end if (adcClkCycNum == 14) begin end if (adcClkCycNum == 15) begin end end  

 

Ive got all the pinouts selected per the Altera manual. 

 

My guess is that I have many things fatally wrong with this program. This is my first time trying to interface with an adc. 

Any suggestions? 

 

Thanks all
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2 Replies
Altera_Forum
Honored Contributor I
32 Views

You don't set the initial value of led, and you don't have any code that would turn LEDs back off once they are on. There's one assignment that turns most of them on if adcSample is equal to 150 at any moment (however briefly), and after that LEDs remain in that state permanently.

Altera_Forum
Honored Contributor I
32 Views

 

--- Quote Start ---  

You don't set the initial value of led, and you don't have any code that would turn LEDs back off once they are on. There's one assignment that turns most of them on if adcSample is equal to 150 at any moment (however briefly), and after that LEDs remain in that state permanently. 

--- Quote End ---  

 

 

Thank you!! That was it. 

 

This is my first time writing an fpga routine, cant believe that was my only mistake to be honest... 

 

all working now! thanks!
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