Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
Announcements
FPGA community forums and blogs on community.intel.com are migrating to the new Altera Community and are read-only. For urgent support needs during this transition, please visit the FPGA Design Resources page or contact an Altera Authorized Distributor.

error during simulation

Altera_Forum
Honored Contributor II
1,228 Views

Hi 

I am simulating my project using Quartus II and getting following error 

 

Error: Simulation results from c:/altera/80copy2/quartus/voq_switch/db/voq_switch.sim.cvwf (0 ps to 1.0 us) do not match expected results from vector source file c:/altera/80copy2/quartus/voq_switch/voq_switch.vwf 

 

can u please tell me what could be the problem 

 

Thank you
0 Kudos
0 Replies
Reply