Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
Announcements
FPGA community forums and blogs on community.intel.com are migrating to the new Altera Community and are read-only. For urgent support needs during this transition, please visit the FPGA Design Resources page or contact an Altera Authorized Distributor.
17268 Discussions

error in altera-modelsim simulation

abhishek
Beginner
‎09-14-2018 08:58 AM
1,985 Views

Hi am trying to simulate a design in altera-modelsim for a simple design am just trying to observe the internal signal of a design in testbench using $display or $monitor but it throws a error at that line is there any particular sytax in altera-modelsim?

can you please help me out

 

$monitor("data:%d\n",test_tb.top.Interface.start);

here start is the internal signal to be observed

0 Kudos

Link Copied

1 Reply
Tricky
New Contributor II
‎09-14-2018 10:08 AM
1,124 Views

What is the error?

0 Kudos
Copy link
Reply

Community support is provided Monday to Friday. Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.